hardware language中文什么意思

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用"hardware language"造句

硬件语言

hardware: 〔集合词〕 1.五金器具；金属制品。 2.( ...
language: n. 1.语言；(某民族，某国的)国语；语调，措词。 2 ...
analog hardware description language: 模拟硬件描述语言
computer hardware definition language: 计算机硬件定义语言
computer hardware description language: 计算机描述语言; 计算机硬件描述语言

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例句与用法

This paper has used the hardware language vhdl ( vhsic hardware description language ) to program some special circuit and prepared some work for the system on chip ( soc )
利用硬件描述语言将调速控制所需的一些电路综合在fpga芯片上为电机控制器向片内系统( soc )方向发展做了一定的工作。
The aim of this paper is to implement the decoder of turbo codes with fpga . the iterative decoding algorithms and how to implement them with hardware language have been discussed in the paper
本文以turbo码译码器的fpga实现为目标,对turbo码的迭代译码算法及用硬件语言实现其译码算法进行了深入研究。
Digital image processing consume a large amount of memory and time commonly . basing on the advantage of fpga , the paper design harware module by hdl ( hardware language ) , i . e . , some function is achieved by les ( logic element ) of the fpga . the real - time of digital image processing is achieved by this . the sample and display of digital image is the important part . so , the paper mainly design the sample and desplay module . the sample card is designed and it ’ s word mode is configured according china ’ s cvbs ( composite video bar signal ) . for acquiring the image and storing it correctly to sram , the paper design the sample - control module . the sample module can work correctly using least time . the reliability and real - time achieve the reference . according the vga principle and scheduling of the ths8134 , the paper design a vga - control module by hdl . firstly , the control signal is synthesized secondly , the horirontal and vertical synchronization signals is synthesized according to the vga interface standard
图像处理的特点是处理的数据量大,处理非常耗时,为实现数字图像的实时处理,本文研究了在fpga上用硬件描述语言实现功能模块的方法,通过功能模块的硬件化,解决了视频图像处理的速度问题。图像数据的正确采集和显示输出是其中的两个重要的模块,因此,本文主要完成了图像数据的采集和显示输出的设计。本文设计了采集卡,并要对其工作模式进行了配置和编写了采集控制模块,在采集控制模块的控制下,将数字图像数据正确无误的存储到了sram中。
The vxibus c - size and i , q channels are employed in this module design , and the sampling rate in each channel reaches 500mhz . the memoty deep of the system is 2mb each channel and cpu is high - speed embedded cpu ( powerpc ) . the timing and logic function are fulfilled by fpga . after the disscusion of signal adjusted , the detailed scheme of this module design have been showed . in this design , there is much logic function design , and it is very strict with the hardware language program . so the basic flow of hardware program design and several very important methods of high speed logic function design , which is described by vhdl , are introduced . also , expatiated the inner modules structure of fpga for forepart circuit , the keystone and difficulties of the design . the design of high - speed pcb is another difficuty of realizing high - speed data acquisition system , and it is very important . the timing simulating results of several pivotal modules are depicted . high - speed signal paths are terminated to match the characteristic impedance . the design undergoes integrity analysis and software simulation
在本模块的设计中,有着大量的逻辑设计,对硬件语言程序的编写要求比较高,因此,文中介绍了硬件程序设计的基本流程,以及几种基于vhdl硬件语言设计在高速逻辑设计中非常重要的方法。同时阐述了本模块设计的前端fpga的内部模块结构,设计的重点、难点,并给出了重要模块的时序仿真结果。高速pcb的设计也是目前实现高速数据采集系统的难点和重点,文中详细的阐明了高速pcb设计中的注意点,以及作者在设计本模块时的经验和心得。

其他语言

hardware languageとは意味

hardware language перевод

hardware language中文什么意思

例句与用法

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